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2 Commits
v1.0.1 ... main

Author SHA1 Message Date
df7feb376d Remove duplicates of displacement 2025-09-26 11:44:38 +03:00
497d0715da Remove unneccessary checks 2025-09-26 10:23:54 +03:00
14 changed files with 313 additions and 9098 deletions

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@@ -1,125 +0,0 @@
// Package disasm provides tests for the Z80 disassembler implementation
package disasm
import (
"testing"
)
// TestDecodeCB tests decoding of CB-prefixed Z80 instructions
func TestDecodeCB(t *testing.T) {
d := New()
tests := []struct {
name string
data []byte
expected Instruction
hasError bool
}{
{
name: "RLC B",
data: []byte{0xCB, 0x00},
expected: Instruction{
Mnemonic: "RLC B",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "RLC C",
data: []byte{0xCB, 0x01},
expected: Instruction{
Mnemonic: "RLC C",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "RLC D",
data: []byte{0xCB, 0x02},
expected: Instruction{
Mnemonic: "RLC D",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "RLC E",
data: []byte{0xCB, 0x03},
expected: Instruction{
Mnemonic: "RLC E",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "RLC H",
data: []byte{0xCB, 0x04},
expected: Instruction{
Mnemonic: "RLC H",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "RLC L",
data: []byte{0xCB, 0x05},
expected: Instruction{
Mnemonic: "RLC L",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "RLC (HL)",
data: []byte{0xCB, 0x06},
expected: Instruction{
Mnemonic: "RLC (HL)",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "RLC A",
data: []byte{0xCB, 0x07},
expected: Instruction{
Mnemonic: "RLC A",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "Insufficient data for CB prefix",
data: []byte{0xCB},
hasError: true,
},
}
for _, tt := range tests {
t.Run(tt.name, func(t *testing.T) {
result, err := d.Decode(tt.data)
if tt.hasError {
if err == nil {
t.Errorf("expected error but got none")
}
return
}
if err != nil {
t.Fatalf("unexpected error: %v", err)
}
if result.Mnemonic != tt.expected.Mnemonic {
t.Errorf("mnemonic mismatch: got %q, want %q", result.Mnemonic, tt.expected.Mnemonic)
}
if result.Length != tt.expected.Length {
t.Errorf("length mismatch: got %d, want %d", result.Length, tt.expected.Length)
}
if result.Address != tt.expected.Address {
t.Errorf("address mismatch: got 0x%04X, want 0x%04X", result.Address, tt.expected.Address)
}
})
}
}

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@@ -1,823 +0,0 @@
// Package disasm provides tests for the Z80 disassembler implementation
package disasm
import (
"testing"
)
// TestDecodeDD tests decoding of DD-prefixed Z80 instructions
func TestDecodeDD(t *testing.T) {
d := New()
tests := []struct {
name string
data []byte
expected Instruction
hasError bool
}{
{
name: "LD IX, nn",
data: []byte{0xDD, 0x21, 0x34, 0x12},
expected: Instruction{
Mnemonic: "LD IX, $1234",
Length: 4,
Address: 0x1234,
},
},
{
name: "ADD IX, BC",
data: []byte{0xDD, 0x09},
expected: Instruction{
Mnemonic: "ADD IX, BC",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "ADD IX, DE",
data: []byte{0xDD, 0x19},
expected: Instruction{
Mnemonic: "ADD IX, DE",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD (nn), IX",
data: []byte{0xDD, 0x22, 0x12, 0x34},
expected: Instruction{
Mnemonic: "LD ($3412), IX",
Length: 4,
Address: 0x3412,
},
},
{
name: "INC IX",
data: []byte{0xDD, 0x23},
expected: Instruction{
Mnemonic: "INC IX",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "INC IXH",
data: []byte{0xDD, 0x24},
expected: Instruction{
Mnemonic: "INC IXH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "DEC IXH",
data: []byte{0xDD, 0x25},
expected: Instruction{
Mnemonic: "DEC IXH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IXH, n",
data: []byte{0xDD, 0x26, 0x42},
expected: Instruction{
Mnemonic: "LD IXH, $42",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "ADD IX, IX",
data: []byte{0xDD, 0x29},
expected: Instruction{
Mnemonic: "ADD IX, IX",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IX, (nn)",
data: []byte{0xDD, 0x2A, 0x12, 0x34},
expected: Instruction{
Mnemonic: "LD IX, ($3412)",
Length: 4,
Address: 0x3412,
},
},
{
name: "DEC IX",
data: []byte{0xDD, 0x2B},
expected: Instruction{
Mnemonic: "DEC IX",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "INC IXL",
data: []byte{0xDD, 0x2C},
expected: Instruction{
Mnemonic: "INC IXL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "DEC IXL",
data: []byte{0xDD, 0x2D},
expected: Instruction{
Mnemonic: "DEC IXL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IXL, n",
data: []byte{0xDD, 0x2E, 0x42},
expected: Instruction{
Mnemonic: "LD IXL, $42",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "INC (IX+d)",
data: []byte{0xDD, 0x34, 0x05},
expected: Instruction{
Mnemonic: "INC (IX+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "DEC (IX+d)",
data: []byte{0xDD, 0x35, 0x05},
expected: Instruction{
Mnemonic: "DEC (IX+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD (IX+d), n",
data: []byte{0xDD, 0x36, 0x05, 0x42},
expected: Instruction{
Mnemonic: "LD (IX+$05), $42",
Length: 4,
Address: 0xFFFF,
},
},
{
name: "ADD IX, SP",
data: []byte{0xDD, 0x39},
expected: Instruction{
Mnemonic: "ADD IX, SP",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD B, IXH",
data: []byte{0xDD, 0x44},
expected: Instruction{
Mnemonic: "LD B, IXH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD B, IXL",
data: []byte{0xDD, 0x45},
expected: Instruction{
Mnemonic: "LD B, IXL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD B, (IX+d)",
data: []byte{0xDD, 0x46, 0x05},
expected: Instruction{
Mnemonic: "LD B, (IX+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD C, IXH",
data: []byte{0xDD, 0x4C},
expected: Instruction{
Mnemonic: "LD C, IXH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD C, IXL",
data: []byte{0xDD, 0x4D},
expected: Instruction{
Mnemonic: "LD C, IXL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD C, (IX+d)",
data: []byte{0xDD, 0x4E, 0x05},
expected: Instruction{
Mnemonic: "LD C, (IX+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD D, IXH",
data: []byte{0xDD, 0x54},
expected: Instruction{
Mnemonic: "LD D, IXH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD D, IXL",
data: []byte{0xDD, 0x55},
expected: Instruction{
Mnemonic: "LD D, IXL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD D, (IX+d)",
data: []byte{0xDD, 0x56, 0x05},
expected: Instruction{
Mnemonic: "LD D, (IX+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD E, IXH",
data: []byte{0xDD, 0x5C},
expected: Instruction{
Mnemonic: "LD E, IXH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD E, IXL",
data: []byte{0xDD, 0x5D},
expected: Instruction{
Mnemonic: "LD E, IXL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD E, (IX+d)",
data: []byte{0xDD, 0x5E, 0x05},
expected: Instruction{
Mnemonic: "LD E, (IX+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD IXH, B",
data: []byte{0xDD, 0x60},
expected: Instruction{
Mnemonic: "LD IXH, B",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IXH, C",
data: []byte{0xDD, 0x61},
expected: Instruction{
Mnemonic: "LD IXH, C",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IXH, D",
data: []byte{0xDD, 0x62},
expected: Instruction{
Mnemonic: "LD IXH, D",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IXH, E",
data: []byte{0xDD, 0x63},
expected: Instruction{
Mnemonic: "LD IXH, E",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IXH, IXH",
data: []byte{0xDD, 0x64},
expected: Instruction{
Mnemonic: "LD IXH, IXH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IXH, IXL",
data: []byte{0xDD, 0x65},
expected: Instruction{
Mnemonic: "LD IXH, IXL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD H, (IX+d)",
data: []byte{0xDD, 0x66, 0x05},
expected: Instruction{
Mnemonic: "LD H, (IX+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD IXH, A",
data: []byte{0xDD, 0x67},
expected: Instruction{
Mnemonic: "LD IXH, A",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IXL, B",
data: []byte{0xDD, 0x68},
expected: Instruction{
Mnemonic: "LD IXL, B",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IXL, C",
data: []byte{0xDD, 0x69},
expected: Instruction{
Mnemonic: "LD IXL, C",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IXL, D",
data: []byte{0xDD, 0x6A},
expected: Instruction{
Mnemonic: "LD IXL, D",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IXL, E",
data: []byte{0xDD, 0x6B},
expected: Instruction{
Mnemonic: "LD IXL, E",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IXL, IXH",
data: []byte{0xDD, 0x6C},
expected: Instruction{
Mnemonic: "LD IXL, IXH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IXL, IXL",
data: []byte{0xDD, 0x6D},
expected: Instruction{
Mnemonic: "LD IXL, IXL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD L, (IX+d)",
data: []byte{0xDD, 0x6E, 0x05},
expected: Instruction{
Mnemonic: "LD L, (IX+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD IXL, A",
data: []byte{0xDD, 0x6F},
expected: Instruction{
Mnemonic: "LD IXL, A",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD (IX+d), B",
data: []byte{0xDD, 0x70, 0x05},
expected: Instruction{
Mnemonic: "LD (IX+$05), B",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD (IX+d), C",
data: []byte{0xDD, 0x71, 0x05},
expected: Instruction{
Mnemonic: "LD (IX+$05), C",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD (IX+d), D",
data: []byte{0xDD, 0x72, 0x05},
expected: Instruction{
Mnemonic: "LD (IX+$05), D",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD (IX+d), E",
data: []byte{0xDD, 0x73, 0x05},
expected: Instruction{
Mnemonic: "LD (IX+$05), E",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD (IX+d), H",
data: []byte{0xDD, 0x74, 0x05},
expected: Instruction{
Mnemonic: "LD (IX+$05), H",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD (IX+d), L",
data: []byte{0xDD, 0x75, 0x05},
expected: Instruction{
Mnemonic: "LD (IX+$05), L",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD (IX+d), A",
data: []byte{0xDD, 0x77, 0x05},
expected: Instruction{
Mnemonic: "LD (IX+$05), A",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD A, IXH",
data: []byte{0xDD, 0x7C},
expected: Instruction{
Mnemonic: "LD A, IXH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD A, IXL",
data: []byte{0xDD, 0x7D},
expected: Instruction{
Mnemonic: "LD A, IXL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD A, (IX+d)",
data: []byte{0xDD, 0x7E, 0x05},
expected: Instruction{
Mnemonic: "LD A, (IX+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "ADD A, IXH",
data: []byte{0xDD, 0x84},
expected: Instruction{
Mnemonic: "ADD A, IXH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "ADD A, IXL",
data: []byte{0xDD, 0x85},
expected: Instruction{
Mnemonic: "ADD A, IXL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "ADD A, (IX+d)",
data: []byte{0xDD, 0x86, 0x05},
expected: Instruction{
Mnemonic: "ADD A, (IX+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "ADC A, IXH",
data: []byte{0xDD, 0x8C},
expected: Instruction{
Mnemonic: "ADC A, IXH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "ADC A, IXL",
data: []byte{0xDD, 0x8D},
expected: Instruction{
Mnemonic: "ADC A, IXL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "ADC A, (IX+d)",
data: []byte{0xDD, 0x8E, 0x05},
expected: Instruction{
Mnemonic: "ADC A, (IX+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "SUB IXH",
data: []byte{0xDD, 0x94},
expected: Instruction{
Mnemonic: "SUB IXH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "SUB IXL",
data: []byte{0xDD, 0x95},
expected: Instruction{
Mnemonic: "SUB IXL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "SUB (IX+d)",
data: []byte{0xDD, 0x96, 0x05},
expected: Instruction{
Mnemonic: "SUB (IX+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "SBC A, IXH",
data: []byte{0xDD, 0x9C},
expected: Instruction{
Mnemonic: "SBC A, IXH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "SBC A, IXL",
data: []byte{0xDD, 0x9D},
expected: Instruction{
Mnemonic: "SBC A, IXL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "SBC A, (IX+d)",
data: []byte{0xDD, 0x9E, 0x05},
expected: Instruction{
Mnemonic: "SBC A, (IX+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "AND IXH",
data: []byte{0xDD, 0xA4},
expected: Instruction{
Mnemonic: "AND IXH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "AND IXL",
data: []byte{0xDD, 0xA5},
expected: Instruction{
Mnemonic: "AND IXL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "AND (IX+d)",
data: []byte{0xDD, 0xA6, 0x05},
expected: Instruction{
Mnemonic: "AND (IX+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "XOR IXH",
data: []byte{0xDD, 0xAC},
expected: Instruction{
Mnemonic: "XOR IXH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "XOR IXL",
data: []byte{0xDD, 0xAD},
expected: Instruction{
Mnemonic: "XOR IXL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "XOR (IX+d)",
data: []byte{0xDD, 0xAE, 0x05},
expected: Instruction{
Mnemonic: "XOR (IX+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "OR IXH",
data: []byte{0xDD, 0xB4},
expected: Instruction{
Mnemonic: "OR IXH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "OR IXL",
data: []byte{0xDD, 0xB5},
expected: Instruction{
Mnemonic: "OR IXL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "OR (IX+d)",
data: []byte{0xDD, 0xB6, 0x05},
expected: Instruction{
Mnemonic: "OR (IX+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "CP IXH",
data: []byte{0xDD, 0xBC},
expected: Instruction{
Mnemonic: "CP IXH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "CP IXL",
data: []byte{0xDD, 0xBD},
expected: Instruction{
Mnemonic: "CP IXL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "CP (IX+d)",
data: []byte{0xDD, 0xBE, 0x05},
expected: Instruction{
Mnemonic: "CP (IX+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "POP IX",
data: []byte{0xDD, 0xE1},
expected: Instruction{
Mnemonic: "POP IX",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "EX (SP), IX",
data: []byte{0xDD, 0xE3},
expected: Instruction{
Mnemonic: "EX (SP), IX",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "PUSH IX",
data: []byte{0xDD, 0xE5},
expected: Instruction{
Mnemonic: "PUSH IX",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "JP (IX)",
data: []byte{0xDD, 0xE9},
expected: Instruction{
Mnemonic: "JP (IX)",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD SP, IX",
data: []byte{0xDD, 0xF9},
expected: Instruction{
Mnemonic: "LD SP, IX",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "Insufficient data for DD prefix",
data: []byte{0xDD},
hasError: true,
},
{
name: "Insufficient data for LD IX, nn",
data: []byte{0xDD, 0x21, 0x34},
hasError: true,
},
}
for _, tt := range tests {
t.Run(tt.name, func(t *testing.T) {
result, err := d.Decode(tt.data)
if tt.hasError {
if err == nil {
t.Errorf("expected error but got none")
}
return
}
if err != nil {
t.Fatalf("unexpected error: %v", err)
}
if result.Mnemonic != tt.expected.Mnemonic {
t.Errorf("mnemonic mismatch: got %q, want %q", result.Mnemonic, tt.expected.Mnemonic)
}
if result.Length != tt.expected.Length {
t.Errorf("length mismatch: got %d, want %d", result.Length, tt.expected.Length)
}
if result.Address != tt.expected.Address {
t.Errorf("address mismatch: got 0x%04X, want 0x%04X", result.Address, tt.expected.Address)
}
})
}
}

File diff suppressed because it is too large Load Diff

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@@ -6,10 +6,6 @@ import (
// decodeCB decodes CB-prefixed instructions
func (d *Disassembler) decodeCB(data []byte) (*Instruction, error) {
if len(data) < 2 {
return nil, fmt.Errorf("insufficient data for CB prefix")
}
opcode := data[1]
// Handle CB prefixed instructions

File diff suppressed because it is too large Load Diff

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@@ -6,10 +6,6 @@ import (
// decodeED decodes ED-prefixed instructions
func (d *Disassembler) decodeED(data []byte) (*Instruction, error) {
if len(data) < 2 {
return nil, fmt.Errorf("insufficient data for ED prefix")
}
opcode := data[1]
// Handle ED prefixed instructions
@@ -22,9 +18,6 @@ func (d *Disassembler) decodeED(data []byte) (*Instruction, error) {
case 0x42:
return &Instruction{Mnemonic: "SBC HL, BC", Length: 2, Address: 0xFFFF}, nil
case 0x43:
if len(data) < 4 {
return nil, fmt.Errorf("insufficient data for LD (nn), BC")
}
nn := uint16(data[3])<<8 | uint16(data[2])
return &Instruction{Mnemonic: fmt.Sprintf("LD ($%04X), BC", nn), Length: 4, Address: nn}, nil
case 0x44:
@@ -42,9 +35,6 @@ func (d *Disassembler) decodeED(data []byte) (*Instruction, error) {
case 0x4A:
return &Instruction{Mnemonic: "ADC HL, BC", Length: 2, Address: 0xFFFF}, nil
case 0x4B:
if len(data) < 4 {
return nil, fmt.Errorf("insufficient data for LD BC, (nn)")
}
nn := uint16(data[3])<<8 | uint16(data[2])
return &Instruction{Mnemonic: fmt.Sprintf("LD BC, ($%04X)", nn), Length: 4, Address: nn}, nil
case 0x4C:
@@ -64,9 +54,6 @@ func (d *Disassembler) decodeED(data []byte) (*Instruction, error) {
case 0x52:
return &Instruction{Mnemonic: "SBC HL, DE", Length: 2, Address: 0xFFFF}, nil
case 0x53:
if len(data) < 4 {
return nil, fmt.Errorf("insufficient data for LD (nn), DE")
}
nn := uint16(data[3])<<8 | uint16(data[2])
return &Instruction{Mnemonic: fmt.Sprintf("LD ($%04X), DE", nn), Length: 4, Address: nn}, nil
case 0x54:
@@ -84,9 +71,6 @@ func (d *Disassembler) decodeED(data []byte) (*Instruction, error) {
case 0x5A:
return &Instruction{Mnemonic: "ADC HL, DE", Length: 2, Address: 0xFFFF}, nil
case 0x5B:
if len(data) < 4 {
return nil, fmt.Errorf("insufficient data for LD DE, (nn)")
}
nn := uint16(data[3])<<8 | uint16(data[2])
return &Instruction{Mnemonic: fmt.Sprintf("LD DE, ($%04X)", nn), Length: 4, Address: nn}, nil
case 0x5C:
@@ -106,9 +90,6 @@ func (d *Disassembler) decodeED(data []byte) (*Instruction, error) {
case 0x62:
return &Instruction{Mnemonic: "SBC HL, HL", Length: 2, Address: 0xFFFF}, nil
case 0x63:
if len(data) < 4 {
return nil, fmt.Errorf("insufficient data for LD (nn), HL")
}
nn := uint16(data[3])<<8 | uint16(data[2])
return &Instruction{Mnemonic: fmt.Sprintf("LD ($%04X), HL", nn), Length: 4, Address: nn}, nil
case 0x64:
@@ -126,9 +107,6 @@ func (d *Disassembler) decodeED(data []byte) (*Instruction, error) {
case 0x6A:
return &Instruction{Mnemonic: "ADC HL, HL", Length: 2, Address: 0xFFFF}, nil
case 0x6B:
if len(data) < 4 {
return nil, fmt.Errorf("insufficient data for LD HL, (nn)")
}
nn := uint16(data[3])<<8 | uint16(data[2])
return &Instruction{Mnemonic: fmt.Sprintf("LD HL, ($%04X)", nn), Length: 4, Address: nn}, nil
case 0x6C:
@@ -148,9 +126,6 @@ func (d *Disassembler) decodeED(data []byte) (*Instruction, error) {
case 0x72:
return &Instruction{Mnemonic: "SBC HL, SP", Length: 2, Address: 0xFFFF}, nil
case 0x73:
if len(data) < 4 {
return nil, fmt.Errorf("insufficient data for LD (nn), SP")
}
nn := uint16(data[3])<<8 | uint16(data[2])
return &Instruction{Mnemonic: fmt.Sprintf("LD ($%04X), SP", nn), Length: 4, Address: nn}, nil
case 0x74:
@@ -168,9 +143,6 @@ func (d *Disassembler) decodeED(data []byte) (*Instruction, error) {
case 0x7A:
return &Instruction{Mnemonic: "ADC HL, SP", Length: 2, Address: 0xFFFF}, nil
case 0x7B:
if len(data) < 4 {
return nil, fmt.Errorf("insufficient data for LD SP, (nn)")
}
nn := uint16(data[3])<<8 | uint16(data[2])
return &Instruction{Mnemonic: fmt.Sprintf("LD SP, ($%04X)", nn), Length: 4, Address: nn}, nil
case 0x7C:

File diff suppressed because it is too large Load Diff

View File

@@ -11,9 +11,6 @@ func (d *Disassembler) decodeUnprefixed(opcode byte, data []byte) (*Instruction,
case 0x00:
return &Instruction{Mnemonic: "NOP", Length: 1, Address: 0xFFFF}, nil
case 0x01:
if len(data) < 3 {
return nil, fmt.Errorf("insufficient data for LD BC, nn")
}
nn := uint16(data[2])<<8 | uint16(data[1])
return &Instruction{Mnemonic: fmt.Sprintf("LD BC, $%04X", nn), Length: 3, Address: nn}, nil
case 0x02:
@@ -25,9 +22,6 @@ func (d *Disassembler) decodeUnprefixed(opcode byte, data []byte) (*Instruction,
case 0x05:
return &Instruction{Mnemonic: "DEC B", Length: 1, Address: 0xFFFF}, nil
case 0x06:
if len(data) < 2 {
return nil, fmt.Errorf("insufficient data for LD B, n")
}
n := data[1]
return &Instruction{Mnemonic: fmt.Sprintf("LD B, $%02X", n), Length: 2, Address: 0xFFFF}, nil
case 0x07:
@@ -45,17 +39,11 @@ func (d *Disassembler) decodeUnprefixed(opcode byte, data []byte) (*Instruction,
case 0x0D:
return &Instruction{Mnemonic: "DEC C", Length: 1, Address: 0xFFFF}, nil
case 0x0E:
if len(data) < 2 {
return nil, fmt.Errorf("insufficient data for LD C, n")
}
n := data[1]
return &Instruction{Mnemonic: fmt.Sprintf("LD C, $%02X", n), Length: 2, Address: 0xFFFF}, nil
case 0x0F:
return &Instruction{Mnemonic: "RRCA", Length: 1, Address: 0xFFFF}, nil
case 0x10:
if len(data) < 2 {
return nil, fmt.Errorf("insufficient data for DJNZ e")
}
e := int8(data[1])
if e >= 0 {
return &Instruction{Mnemonic: fmt.Sprintf("DJNZ $%02X", e), Length: 2, Address: 0xFFFF}, nil
@@ -63,9 +51,6 @@ func (d *Disassembler) decodeUnprefixed(opcode byte, data []byte) (*Instruction,
return &Instruction{Mnemonic: fmt.Sprintf("DJNZ -$%02X", -e), Length: 2, Address: 0xFFFF}, nil
}
case 0x11:
if len(data) < 3 {
return nil, fmt.Errorf("insufficient data for LD DE, nn")
}
nn := uint16(data[2])<<8 | uint16(data[1])
return &Instruction{Mnemonic: fmt.Sprintf("LD DE, $%04X", nn), Length: 3, Address: nn}, nil
case 0x12:
@@ -77,17 +62,11 @@ func (d *Disassembler) decodeUnprefixed(opcode byte, data []byte) (*Instruction,
case 0x15:
return &Instruction{Mnemonic: "DEC D", Length: 1, Address: 0xFFFF}, nil
case 0x16:
if len(data) < 2 {
return nil, fmt.Errorf("insufficient data for LD D, n")
}
n := data[1]
return &Instruction{Mnemonic: fmt.Sprintf("LD D, $%02X", n), Length: 2, Address: 0xFFFF}, nil
case 0x17:
return &Instruction{Mnemonic: "RLA", Length: 1, Address: 0xFFFF}, nil
case 0x18:
if len(data) < 2 {
return nil, fmt.Errorf("insufficient data for JR e")
}
e := int8(data[1])
if e >= 0 {
return &Instruction{Mnemonic: fmt.Sprintf("JR $%02X", e), Length: 2, Address: 0xFFFF}, nil
@@ -105,17 +84,11 @@ func (d *Disassembler) decodeUnprefixed(opcode byte, data []byte) (*Instruction,
case 0x1D:
return &Instruction{Mnemonic: "DEC E", Length: 1, Address: 0xFFFF}, nil
case 0x1E:
if len(data) < 2 {
return nil, fmt.Errorf("insufficient data for LD E, n")
}
n := data[1]
return &Instruction{Mnemonic: fmt.Sprintf("LD E, $%02X", n), Length: 2, Address: 0xFFFF}, nil
case 0x1F:
return &Instruction{Mnemonic: "RRA", Length: 1, Address: 0xFFFF}, nil
case 0x20:
if len(data) < 2 {
return nil, fmt.Errorf("insufficient data for JR NZ, e")
}
e := int8(data[1])
if e >= 0 {
return &Instruction{Mnemonic: fmt.Sprintf("JR NZ, $%02X", e), Length: 2, Address: 0xFFFF}, nil
@@ -123,15 +96,9 @@ func (d *Disassembler) decodeUnprefixed(opcode byte, data []byte) (*Instruction,
return &Instruction{Mnemonic: fmt.Sprintf("JR NZ, -$%02X", -e), Length: 2, Address: 0xFFFF}, nil
}
case 0x21:
if len(data) < 3 {
return nil, fmt.Errorf("insufficient data for LD HL, nn")
}
nn := uint16(data[2])<<8 | uint16(data[1])
return &Instruction{Mnemonic: fmt.Sprintf("LD HL, $%04X", nn), Length: 3, Address: nn}, nil
case 0x22:
if len(data) < 3 {
return nil, fmt.Errorf("insufficient data for LD (nn), HL")
}
nn := uint16(data[2])<<8 | uint16(data[1])
return &Instruction{Mnemonic: fmt.Sprintf("LD ($%04X), HL", nn), Length: 3, Address: nn}, nil
case 0x23:
@@ -141,17 +108,11 @@ func (d *Disassembler) decodeUnprefixed(opcode byte, data []byte) (*Instruction,
case 0x25:
return &Instruction{Mnemonic: "DEC H", Length: 1, Address: 0xFFFF}, nil
case 0x26:
if len(data) < 2 {
return nil, fmt.Errorf("insufficient data for LD H, n")
}
n := data[1]
return &Instruction{Mnemonic: fmt.Sprintf("LD H, $%02X", n), Length: 2, Address: 0xFFFF}, nil
case 0x27:
return &Instruction{Mnemonic: "DAA", Length: 1, Address: 0xFFFF}, nil
case 0x28:
if len(data) < 2 {
return nil, fmt.Errorf("insufficient data for JR Z, e")
}
e := int8(data[1])
if e >= 0 {
return &Instruction{Mnemonic: fmt.Sprintf("JR Z, $%02X", e), Length: 2, Address: 0xFFFF}, nil
@@ -161,9 +122,6 @@ func (d *Disassembler) decodeUnprefixed(opcode byte, data []byte) (*Instruction,
case 0x29:
return &Instruction{Mnemonic: "ADD HL, HL", Length: 1, Address: 0xFFFF}, nil
case 0x2A:
if len(data) < 3 {
return nil, fmt.Errorf("insufficient data for LD HL, (nn)")
}
nn := uint16(data[2])<<8 | uint16(data[1])
return &Instruction{Mnemonic: fmt.Sprintf("LD HL, ($%04X)", nn), Length: 3, Address: nn}, nil
case 0x2B:
@@ -173,17 +131,11 @@ func (d *Disassembler) decodeUnprefixed(opcode byte, data []byte) (*Instruction,
case 0x2D:
return &Instruction{Mnemonic: "DEC L", Length: 1, Address: 0xFFFF}, nil
case 0x2E:
if len(data) < 2 {
return nil, fmt.Errorf("insufficient data for LD L, n")
}
n := data[1]
return &Instruction{Mnemonic: fmt.Sprintf("LD L, $%02X", n), Length: 2, Address: 0xFFFF}, nil
case 0x2F:
return &Instruction{Mnemonic: "CPL", Length: 1, Address: 0xFFFF}, nil
case 0x30:
if len(data) < 2 {
return nil, fmt.Errorf("insufficient data for JR NC, e")
}
e := int8(data[1])
if e >= 0 {
return &Instruction{Mnemonic: fmt.Sprintf("JR NC, $%02X", e), Length: 2, Address: 0xFFFF}, nil
@@ -191,15 +143,9 @@ func (d *Disassembler) decodeUnprefixed(opcode byte, data []byte) (*Instruction,
return &Instruction{Mnemonic: fmt.Sprintf("JR NC, -$%02X", -e), Length: 2, Address: 0xFFFF}, nil
}
case 0x31:
if len(data) < 3 {
return nil, fmt.Errorf("insufficient data for LD SP, nn")
}
nn := uint16(data[2])<<8 | uint16(data[1])
return &Instruction{Mnemonic: fmt.Sprintf("LD SP, $%04X", nn), Length: 3, Address: nn}, nil
case 0x32:
if len(data) < 3 {
return nil, fmt.Errorf("insufficient data for LD (nn), A")
}
nn := uint16(data[2])<<8 | uint16(data[1])
return &Instruction{Mnemonic: fmt.Sprintf("LD ($%04X), A", nn), Length: 3, Address: nn}, nil
case 0x33:
@@ -209,17 +155,11 @@ func (d *Disassembler) decodeUnprefixed(opcode byte, data []byte) (*Instruction,
case 0x35:
return &Instruction{Mnemonic: "DEC (HL)", Length: 1, Address: 0xFFFF}, nil
case 0x36:
if len(data) < 2 {
return nil, fmt.Errorf("insufficient data for LD (HL), n")
}
n := data[1]
return &Instruction{Mnemonic: fmt.Sprintf("LD (HL), $%02X", n), Length: 2, Address: 0xFFFF}, nil
case 0x37:
return &Instruction{Mnemonic: "SCF", Length: 1, Address: 0xFFFF}, nil
case 0x38:
if len(data) < 2 {
return nil, fmt.Errorf("insufficient data for JR C, e")
}
e := int8(data[1])
if e >= 0 {
return &Instruction{Mnemonic: fmt.Sprintf("JR C, $%02X", e), Length: 2, Address: 0xFFFF}, nil
@@ -229,9 +169,6 @@ func (d *Disassembler) decodeUnprefixed(opcode byte, data []byte) (*Instruction,
case 0x39:
return &Instruction{Mnemonic: "ADD HL, SP", Length: 1, Address: 0xFFFF}, nil
case 0x3A:
if len(data) < 3 {
return nil, fmt.Errorf("insufficient data for LD A, (nn)")
}
nn := uint16(data[2])<<8 | uint16(data[1])
return &Instruction{Mnemonic: fmt.Sprintf("LD A, ($%04X)", nn), Length: 3, Address: nn}, nil
case 0x3B:
@@ -241,9 +178,6 @@ func (d *Disassembler) decodeUnprefixed(opcode byte, data []byte) (*Instruction,
case 0x3D:
return &Instruction{Mnemonic: "DEC A", Length: 1, Address: 0xFFFF}, nil
case 0x3E:
if len(data) < 2 {
return nil, fmt.Errorf("insufficient data for LD A, n")
}
n := data[1]
return &Instruction{Mnemonic: fmt.Sprintf("LD A, $%02X", n), Length: 2, Address: 0xFFFF}, nil
case 0x3F:
@@ -515,29 +449,17 @@ func (d *Disassembler) decodeUnprefixed(opcode byte, data []byte) (*Instruction,
case 0xC1: // POP BC
return &Instruction{Mnemonic: "POP BC", Length: 1, Address: 0xFFFF}, nil
case 0xC2: // JP NZ, nn
if len(data) < 3 {
return nil, fmt.Errorf("insufficient data for JP NZ, nn")
}
nn := uint16(data[2])<<8 | uint16(data[1])
return &Instruction{Mnemonic: fmt.Sprintf("JP NZ, $%04X", nn), Length: 3, Address: nn}, nil
case 0xC3: // JP nn
if len(data) < 3 {
return nil, fmt.Errorf("insufficient data for JP nn")
}
nn := uint16(data[2])<<8 | uint16(data[1])
return &Instruction{Mnemonic: fmt.Sprintf("JP $%04X", nn), Length: 3, Address: nn}, nil
case 0xC4: // CALL NZ, nn
if len(data) < 3 {
return nil, fmt.Errorf("insufficient data for CALL NZ, nn")
}
nn := uint16(data[2])<<8 | uint16(data[1])
return &Instruction{Mnemonic: fmt.Sprintf("CALL NZ, $%04X", nn), Length: 3, Address: nn}, nil
case 0xC5: // PUSH BC
return &Instruction{Mnemonic: "PUSH BC", Length: 1, Address: 0xFFFF}, nil
case 0xC6: // ADD A, n
if len(data) < 2 {
return nil, fmt.Errorf("insufficient data for ADD A, n")
}
n := data[1]
return &Instruction{Mnemonic: fmt.Sprintf("ADD A, $%02X", n), Length: 2, Address: 0xFFFF}, nil
case 0xC7: // RST 00H
@@ -547,30 +469,18 @@ func (d *Disassembler) decodeUnprefixed(opcode byte, data []byte) (*Instruction,
case 0xC9: // RET
return &Instruction{Mnemonic: "RET", Length: 1, Address: 0xFFFF}, nil
case 0xCA: // JP Z, nn
if len(data) < 3 {
return nil, fmt.Errorf("insufficient data for JP Z, nn")
}
nn := uint16(data[2])<<8 | uint16(data[1])
return &Instruction{Mnemonic: fmt.Sprintf("JP Z, $%04X", nn), Length: 3, Address: nn}, nil
case 0xCB: // PREFIX CB
// This should be handled in the main Decode function
return &Instruction{Mnemonic: "PREFIX CB", Length: 1, Address: 0xFFFF}, nil
case 0xCC: // CALL Z, nn
if len(data) < 3 {
return nil, fmt.Errorf("insufficient data for CALL Z, nn")
}
nn := uint16(data[2])<<8 | uint16(data[1])
return &Instruction{Mnemonic: fmt.Sprintf("CALL Z, $%04X", nn), Length: 3, Address: nn}, nil
case 0xCD: // CALL nn
if len(data) < 3 {
return nil, fmt.Errorf("insufficient data for CALL nn")
}
nn := uint16(data[2])<<8 | uint16(data[1])
return &Instruction{Mnemonic: fmt.Sprintf("CALL $%04X", nn), Length: 3, Address: nn}, nil
case 0xCE: // ADC A, n
if len(data) < 2 {
return nil, fmt.Errorf("insufficient data for ADC A, n")
}
n := data[1]
return &Instruction{Mnemonic: fmt.Sprintf("ADC A, $%02X", n), Length: 2, Address: 0xFFFF}, nil
case 0xCF: // RST 08H
@@ -582,29 +492,17 @@ func (d *Disassembler) decodeUnprefixed(opcode byte, data []byte) (*Instruction,
case 0xD1: // POP DE
return &Instruction{Mnemonic: "POP DE", Length: 1, Address: 0xFFFF}, nil
case 0xD2: // JP NC, nn
if len(data) < 3 {
return nil, fmt.Errorf("insufficient data for JP NC, nn")
}
nn := uint16(data[2])<<8 | uint16(data[1])
return &Instruction{Mnemonic: fmt.Sprintf("JP NC, $%04X", nn), Length: 3, Address: nn}, nil
case 0xD3: // OUT (n), A
if len(data) < 2 {
return nil, fmt.Errorf("insufficient data for OUT (n), A")
}
n := data[1]
return &Instruction{Mnemonic: fmt.Sprintf("OUT ($%02X), A", n), Length: 2, Address: 0xFFFF}, nil
case 0xD4: // CALL NC, nn
if len(data) < 3 {
return nil, fmt.Errorf("insufficient data for CALL NC, nn")
}
nn := uint16(data[2])<<8 | uint16(data[1])
return &Instruction{Mnemonic: fmt.Sprintf("CALL NC, $%04X", nn), Length: 3, Address: nn}, nil
case 0xD5: // PUSH DE
return &Instruction{Mnemonic: "PUSH DE", Length: 1, Address: 0xFFFF}, nil
case 0xD6: // SUB n
if len(data) < 2 {
return nil, fmt.Errorf("insufficient data for SUB n")
}
n := data[1]
return &Instruction{Mnemonic: fmt.Sprintf("SUB $%02X", n), Length: 2, Address: 0xFFFF}, nil
case 0xD7: // RST 10H
@@ -614,30 +512,18 @@ func (d *Disassembler) decodeUnprefixed(opcode byte, data []byte) (*Instruction,
case 0xD9: // EXX
return &Instruction{Mnemonic: "EXX", Length: 1, Address: 0xFFFF}, nil
case 0xDA: // JP C, nn
if len(data) < 3 {
return nil, fmt.Errorf("insufficient data for JP C, nn")
}
nn := uint16(data[2])<<8 | uint16(data[1])
return &Instruction{Mnemonic: fmt.Sprintf("JP C, $%04X", nn), Length: 3, Address: nn}, nil
case 0xDB: // IN A, (n)
if len(data) < 2 {
return nil, fmt.Errorf("insufficient data for IN A, (n)")
}
n := data[1]
return &Instruction{Mnemonic: fmt.Sprintf("IN A, ($%02X)", n), Length: 2, Address: 0xFFFF}, nil
case 0xDC: // CALL C, nn
if len(data) < 3 {
return nil, fmt.Errorf("insufficient data for CALL C, nn")
}
nn := uint16(data[2])<<8 | uint16(data[1])
return &Instruction{Mnemonic: fmt.Sprintf("CALL C, $%04X", nn), Length: 3, Address: nn}, nil
case 0xDD: // PREFIX DD
// This should be handled in the main Decode function
return &Instruction{Mnemonic: "PREFIX DD", Length: 1, Address: 0xFFFF}, nil
case 0xDE: // SBC A, n
if len(data) < 2 {
return nil, fmt.Errorf("insufficient data for SBC A, n")
}
n := data[1]
return &Instruction{Mnemonic: fmt.Sprintf("SBC A, $%02X", n), Length: 2, Address: 0xFFFF}, nil
case 0xDF: // RST 18H
@@ -649,25 +535,16 @@ func (d *Disassembler) decodeUnprefixed(opcode byte, data []byte) (*Instruction,
case 0xE1: // POP HL
return &Instruction{Mnemonic: "POP HL", Length: 1, Address: 0xFFFF}, nil
case 0xE2: // JP PO, nn
if len(data) < 3 {
return nil, fmt.Errorf("insufficient data for JP PO, nn")
}
nn := uint16(data[2])<<8 | uint16(data[1])
return &Instruction{Mnemonic: fmt.Sprintf("JP PO, $%04X", nn), Length: 3, Address: nn}, nil
case 0xE3: // EX (SP), HL
return &Instruction{Mnemonic: "EX (SP), HL", Length: 1, Address: 0xFFFF}, nil
case 0xE4: // CALL PO, nn
if len(data) < 3 {
return nil, fmt.Errorf("insufficient data for CALL PO, nn")
}
nn := uint16(data[2])<<8 | uint16(data[1])
return &Instruction{Mnemonic: fmt.Sprintf("CALL PO, $%04X", nn), Length: 3, Address: nn}, nil
case 0xE5: // PUSH HL
return &Instruction{Mnemonic: "PUSH HL", Length: 1, Address: 0xFFFF}, nil
case 0xE6: // AND n
if len(data) < 2 {
return nil, fmt.Errorf("insufficient data for AND n")
}
n := data[1]
return &Instruction{Mnemonic: fmt.Sprintf("AND $%02X", n), Length: 2, Address: 0xFFFF}, nil
case 0xE7: // RST 20H
@@ -677,26 +554,17 @@ func (d *Disassembler) decodeUnprefixed(opcode byte, data []byte) (*Instruction,
case 0xE9: // JP (HL)
return &Instruction{Mnemonic: "JP (HL)", Length: 1, Address: 0xFFFF}, nil
case 0xEA: // JP PE, nn
if len(data) < 3 {
return nil, fmt.Errorf("insufficient data for JP PE, nn")
}
nn := uint16(data[2])<<8 | uint16(data[1])
return &Instruction{Mnemonic: fmt.Sprintf("JP PE, $%04X", nn), Length: 3, Address: nn}, nil
case 0xEB: // EX DE, HL
return &Instruction{Mnemonic: "EX DE, HL", Length: 1, Address: 0xFFFF}, nil
case 0xEC: // CALL PE, nn
if len(data) < 3 {
return nil, fmt.Errorf("insufficient data for CALL PE, nn")
}
nn := uint16(data[2])<<8 | uint16(data[1])
return &Instruction{Mnemonic: fmt.Sprintf("CALL PE, $%04X", nn), Length: 3, Address: nn}, nil
case 0xED: // PREFIX ED
// This should be handled in the main Decode function
return &Instruction{Mnemonic: "PREFIX ED", Length: 1, Address: 0xFFFF}, nil
case 0xEE: // XOR n
if len(data) < 2 {
return nil, fmt.Errorf("insufficient data for XOR n")
}
n := data[1]
return &Instruction{Mnemonic: fmt.Sprintf("XOR $%02X", n), Length: 2, Address: 0xFFFF}, nil
case 0xEF: // RST 28H
@@ -708,25 +576,16 @@ func (d *Disassembler) decodeUnprefixed(opcode byte, data []byte) (*Instruction,
case 0xF1: // POP AF
return &Instruction{Mnemonic: "POP AF", Length: 1, Address: 0xFFFF}, nil
case 0xF2: // JP P, nn
if len(data) < 3 {
return nil, fmt.Errorf("insufficient data for JP P, nn")
}
nn := uint16(data[2])<<8 | uint16(data[1])
return &Instruction{Mnemonic: fmt.Sprintf("JP P, $%04X", nn), Length: 3, Address: nn}, nil
case 0xF3: // DI
return &Instruction{Mnemonic: "DI", Length: 1, Address: 0xFFFF}, nil
case 0xF4: // CALL P, nn
if len(data) < 3 {
return nil, fmt.Errorf("insufficient data for CALL P, nn")
}
nn := uint16(data[2])<<8 | uint16(data[1])
return &Instruction{Mnemonic: fmt.Sprintf("CALL P, $%04X", nn), Length: 3, Address: nn}, nil
case 0xF5: // PUSH AF
return &Instruction{Mnemonic: "PUSH AF", Length: 1, Address: 0xFFFF}, nil
case 0xF6: // OR n
if len(data) < 2 {
return nil, fmt.Errorf("insufficient data for OR n")
}
n := data[1]
return &Instruction{Mnemonic: fmt.Sprintf("OR $%02X", n), Length: 2, Address: 0xFFFF}, nil
case 0xF7: // RST 30H
@@ -736,26 +595,17 @@ func (d *Disassembler) decodeUnprefixed(opcode byte, data []byte) (*Instruction,
case 0xF9: // LD SP, HL
return &Instruction{Mnemonic: "LD SP, HL", Length: 1, Address: 0xFFFF}, nil
case 0xFA: // JP M, nn
if len(data) < 3 {
return nil, fmt.Errorf("insufficient data for JP M, nn")
}
nn := uint16(data[2])<<8 | uint16(data[1])
return &Instruction{Mnemonic: fmt.Sprintf("JP M, $%04X", nn), Length: 3, Address: nn}, nil
case 0xFB: // EI
return &Instruction{Mnemonic: "EI", Length: 1, Address: 0xFFFF}, nil
case 0xFC: // CALL M, nn
if len(data) < 3 {
return nil, fmt.Errorf("insufficient data for CALL M, nn")
}
nn := uint16(data[2])<<8 | uint16(data[1])
return &Instruction{Mnemonic: fmt.Sprintf("CALL M, $%04X", nn), Length: 3, Address: nn}, nil
case 0xFD: // PREFIX FD
// This should be handled in the main Decode function
return &Instruction{Mnemonic: "PREFIX FD", Length: 1, Address: 0xFFFF}, nil
case 0xFE: // CP n
if len(data) < 2 {
return nil, fmt.Errorf("insufficient data for CP n")
}
n := data[1]
return &Instruction{Mnemonic: fmt.Sprintf("CP $%02X", n), Length: 2, Address: 0xFFFF}, nil
case 0xFF: // RST 38H

View File

@@ -1,10 +1,6 @@
// Package disasm provides a Z80 disassembler implementation
package disasm
import (
"fmt"
)
// Instruction represents a decoded Z80 instruction
type Instruction struct {
Mnemonic string // Human-readable instruction mnemonic
@@ -23,10 +19,6 @@ func New() *Disassembler {
// Decode decodes a single Z80 instruction from a byte slice
// It returns the decoded instruction and any error encountered
func (d *Disassembler) Decode(data []byte) (*Instruction, error) {
if len(data) == 0 {
return nil, fmt.Errorf("no data to decode")
}
// Get the first opcode byte
opcode := data[0]

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@@ -1,778 +0,0 @@
// Package disasm provides tests for the Z80 disassembler implementation
package disasm
import (
"testing"
)
// TestDecodeED tests decoding of ED-prefixed Z80 instructions
func TestDecodeED(t *testing.T) {
d := New()
tests := []struct {
name string
data []byte
expected Instruction
hasError bool
}{
{
name: "IN B, (C)",
data: []byte{0xED, 0x40},
expected: Instruction{
Mnemonic: "IN B, (C)",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "OUT (C), B",
data: []byte{0xED, 0x41},
expected: Instruction{
Mnemonic: "OUT (C), B",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "SBC HL, BC",
data: []byte{0xED, 0x42},
expected: Instruction{
Mnemonic: "SBC HL, BC",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD (nn), BC",
data: []byte{0xED, 0x43, 0x12, 0x34},
expected: Instruction{
Mnemonic: "LD ($3412), BC",
Length: 4,
Address: 0x3412,
},
},
{
name: "NEG",
data: []byte{0xED, 0x44},
expected: Instruction{
Mnemonic: "NEG",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "RETN",
data: []byte{0xED, 0x45},
expected: Instruction{
Mnemonic: "RETN",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "IM 0",
data: []byte{0xED, 0x46},
expected: Instruction{
Mnemonic: "IM 0",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD I, A",
data: []byte{0xED, 0x47},
expected: Instruction{
Mnemonic: "LD I, A",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "IN C, (C)",
data: []byte{0xED, 0x48},
expected: Instruction{
Mnemonic: "IN C, (C)",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "OUT (C), C",
data: []byte{0xED, 0x49},
expected: Instruction{
Mnemonic: "OUT (C), C",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "ADC HL, BC",
data: []byte{0xED, 0x4A},
expected: Instruction{
Mnemonic: "ADC HL, BC",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD BC, (nn)",
data: []byte{0xED, 0x4B, 0x12, 0x34},
expected: Instruction{
Mnemonic: "LD BC, ($3412)",
Length: 4,
Address: 0x3412,
},
},
{
name: "NEG (duplicate)",
data: []byte{0xED, 0x4C},
expected: Instruction{
Mnemonic: "NEG",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "RETI",
data: []byte{0xED, 0x4D},
expected: Instruction{
Mnemonic: "RETI",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "IM 0 (duplicate)",
data: []byte{0xED, 0x4E},
expected: Instruction{
Mnemonic: "IM 0",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD R, A",
data: []byte{0xED, 0x4F},
expected: Instruction{
Mnemonic: "LD R, A",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "IN D, (C)",
data: []byte{0xED, 0x50},
expected: Instruction{
Mnemonic: "IN D, (C)",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "OUT (C), D",
data: []byte{0xED, 0x51},
expected: Instruction{
Mnemonic: "OUT (C), D",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "SBC HL, DE",
data: []byte{0xED, 0x52},
expected: Instruction{
Mnemonic: "SBC HL, DE",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD (nn), DE",
data: []byte{0xED, 0x53, 0x12, 0x34},
expected: Instruction{
Mnemonic: "LD ($3412), DE",
Length: 4,
Address: 0x3412,
},
},
{
name: "NEG (duplicate 2)",
data: []byte{0xED, 0x54},
expected: Instruction{
Mnemonic: "NEG",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "RETN (duplicate)",
data: []byte{0xED, 0x55},
expected: Instruction{
Mnemonic: "RETN",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "IM 1",
data: []byte{0xED, 0x56},
expected: Instruction{
Mnemonic: "IM 1",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD A, I",
data: []byte{0xED, 0x57},
expected: Instruction{
Mnemonic: "LD A, I",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "IN E, (C)",
data: []byte{0xED, 0x58},
expected: Instruction{
Mnemonic: "IN E, (C)",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "OUT (C), E",
data: []byte{0xED, 0x59},
expected: Instruction{
Mnemonic: "OUT (C), E",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "ADC HL, DE",
data: []byte{0xED, 0x5A},
expected: Instruction{
Mnemonic: "ADC HL, DE",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD DE, (nn)",
data: []byte{0xED, 0x5B, 0x12, 0x34},
expected: Instruction{
Mnemonic: "LD DE, ($3412)",
Length: 4,
Address: 0x3412,
},
},
{
name: "NEG (duplicate 3)",
data: []byte{0xED, 0x5C},
expected: Instruction{
Mnemonic: "NEG",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "RETN (duplicate 2)",
data: []byte{0xED, 0x5D},
expected: Instruction{
Mnemonic: "RETN",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "IM 2",
data: []byte{0xED, 0x5E},
expected: Instruction{
Mnemonic: "IM 2",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD A, R",
data: []byte{0xED, 0x5F},
expected: Instruction{
Mnemonic: "LD A, R",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "IN H, (C)",
data: []byte{0xED, 0x60},
expected: Instruction{
Mnemonic: "IN H, (C)",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "OUT (C), H",
data: []byte{0xED, 0x61},
expected: Instruction{
Mnemonic: "OUT (C), H",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "SBC HL, HL",
data: []byte{0xED, 0x62},
expected: Instruction{
Mnemonic: "SBC HL, HL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD (nn), HL",
data: []byte{0xED, 0x63, 0x12, 0x34},
expected: Instruction{
Mnemonic: "LD ($3412), HL",
Length: 4,
Address: 0x3412,
},
},
{
name: "NEG (duplicate 4)",
data: []byte{0xED, 0x64},
expected: Instruction{
Mnemonic: "NEG",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "RETN (duplicate 3)",
data: []byte{0xED, 0x65},
expected: Instruction{
Mnemonic: "RETN",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "IM 0 (duplicate 2)",
data: []byte{0xED, 0x66},
expected: Instruction{
Mnemonic: "IM 0",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "RRD",
data: []byte{0xED, 0x67},
expected: Instruction{
Mnemonic: "RRD",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "IN L, (C)",
data: []byte{0xED, 0x68},
expected: Instruction{
Mnemonic: "IN L, (C)",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "OUT (C), L",
data: []byte{0xED, 0x69},
expected: Instruction{
Mnemonic: "OUT (C), L",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "ADC HL, HL",
data: []byte{0xED, 0x6A},
expected: Instruction{
Mnemonic: "ADC HL, HL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD HL, (nn)",
data: []byte{0xED, 0x6B, 0x12, 0x34},
expected: Instruction{
Mnemonic: "LD HL, ($3412)",
Length: 4,
Address: 0x3412,
},
},
{
name: "NEG (duplicate 5)",
data: []byte{0xED, 0x6C},
expected: Instruction{
Mnemonic: "NEG",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "RETN (duplicate 4)",
data: []byte{0xED, 0x6D},
expected: Instruction{
Mnemonic: "RETN",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "IM 0 (duplicate 3)",
data: []byte{0xED, 0x6E},
expected: Instruction{
Mnemonic: "IM 0",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "RLD",
data: []byte{0xED, 0x6F},
expected: Instruction{
Mnemonic: "RLD",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "IN F, (C)",
data: []byte{0xED, 0x70},
expected: Instruction{
Mnemonic: "IN F, (C)",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "OUT (C), 0",
data: []byte{0xED, 0x71},
expected: Instruction{
Mnemonic: "OUT (C), 0",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "SBC HL, SP",
data: []byte{0xED, 0x72},
expected: Instruction{
Mnemonic: "SBC HL, SP",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD (nn), SP",
data: []byte{0xED, 0x73, 0x12, 0x34},
expected: Instruction{
Mnemonic: "LD ($3412), SP",
Length: 4,
Address: 0x3412,
},
},
{
name: "NEG (duplicate 6)",
data: []byte{0xED, 0x74},
expected: Instruction{
Mnemonic: "NEG",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "RETN (duplicate 5)",
data: []byte{0xED, 0x75},
expected: Instruction{
Mnemonic: "RETN",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "IM 1 (duplicate)",
data: []byte{0xED, 0x76},
expected: Instruction{
Mnemonic: "IM 1",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "NOP",
data: []byte{0xED, 0x77},
expected: Instruction{
Mnemonic: "NOP",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "IN A, (C)",
data: []byte{0xED, 0x78},
expected: Instruction{
Mnemonic: "IN A, (C)",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "OUT (C), A",
data: []byte{0xED, 0x79},
expected: Instruction{
Mnemonic: "OUT (C), A",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "ADC HL, SP",
data: []byte{0xED, 0x7A},
expected: Instruction{
Mnemonic: "ADC HL, SP",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD SP, (nn)",
data: []byte{0xED, 0x7B, 0x12, 0x34},
expected: Instruction{
Mnemonic: "LD SP, ($3412)",
Length: 4,
Address: 0x3412,
},
},
{
name: "NEG (duplicate 7)",
data: []byte{0xED, 0x7C},
expected: Instruction{
Mnemonic: "NEG",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "RETN (duplicate 6)",
data: []byte{0xED, 0x7D},
expected: Instruction{
Mnemonic: "RETN",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "IM 2 (duplicate)",
data: []byte{0xED, 0x7E},
expected: Instruction{
Mnemonic: "IM 2",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "NOP (duplicate)",
data: []byte{0xED, 0x7F},
expected: Instruction{
Mnemonic: "NOP",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LDI",
data: []byte{0xED, 0xA0},
expected: Instruction{
Mnemonic: "LDI",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "CPI",
data: []byte{0xED, 0xA1},
expected: Instruction{
Mnemonic: "CPI",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "INI",
data: []byte{0xED, 0xA2},
expected: Instruction{
Mnemonic: "INI",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "OUTI",
data: []byte{0xED, 0xA3},
expected: Instruction{
Mnemonic: "OUTI",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LDD",
data: []byte{0xED, 0xA8},
expected: Instruction{
Mnemonic: "LDD",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "CPD",
data: []byte{0xED, 0xA9},
expected: Instruction{
Mnemonic: "CPD",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "IND",
data: []byte{0xED, 0xAA},
expected: Instruction{
Mnemonic: "IND",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "OUTD",
data: []byte{0xED, 0xAB},
expected: Instruction{
Mnemonic: "OUTD",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LDIR",
data: []byte{0xED, 0xB0},
expected: Instruction{
Mnemonic: "LDIR",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "CPIR",
data: []byte{0xED, 0xB1},
expected: Instruction{
Mnemonic: "CPIR",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "INIR",
data: []byte{0xED, 0xB2},
expected: Instruction{
Mnemonic: "INIR",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "OTIR",
data: []byte{0xED, 0xB3},
expected: Instruction{
Mnemonic: "OTIR",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LDDR",
data: []byte{0xED, 0xB8},
expected: Instruction{
Mnemonic: "LDDR",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "CPDR",
data: []byte{0xED, 0xB9},
expected: Instruction{
Mnemonic: "CPDR",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "INDR",
data: []byte{0xED, 0xBA},
expected: Instruction{
Mnemonic: "INDR",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "OTDR",
data: []byte{0xED, 0xBB},
expected: Instruction{
Mnemonic: "OTDR",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "Insufficient data for ED prefix",
data: []byte{0xED},
hasError: true,
},
{
name: "Insufficient data for LD (nn), BC",
data: []byte{0xED, 0x43, 0x12},
hasError: true,
},
}
for _, tt := range tests {
t.Run(tt.name, func(t *testing.T) {
result, err := d.Decode(tt.data)
if tt.hasError {
if err == nil {
t.Errorf("expected error but got none")
}
return
}
if err != nil {
t.Fatalf("unexpected error: %v", err)
}
if result.Mnemonic != tt.expected.Mnemonic {
t.Errorf("mnemonic mismatch: got %q, want %q", result.Mnemonic, tt.expected.Mnemonic)
}
if result.Length != tt.expected.Length {
t.Errorf("length mismatch: got %d, want %d", result.Length, tt.expected.Length)
}
if result.Address != tt.expected.Address {
t.Errorf("address mismatch: got 0x%04X, want 0x%04X", result.Address, tt.expected.Address)
}
})
}
}

View File

@@ -1,15 +0,0 @@
// Package disasm provides tests for the Z80 disassembler implementation
package disasm
import (
"testing"
)
// TestEmptyData tests handling of empty data
func TestEmptyData(t *testing.T) {
d := New()
_, err := d.Decode([]byte{})
if err == nil {
t.Errorf("expected error for empty data but got none")
}
}

View File

@@ -1,823 +0,0 @@
// Package disasm provides tests for the Z80 disassembler implementation
package disasm
import (
"testing"
)
// TestDecodeFD tests decoding of FD-prefixed Z80 instructions
func TestDecodeFD(t *testing.T) {
d := New()
tests := []struct {
name string
data []byte
expected Instruction
hasError bool
}{
{
name: "LD IY, nn",
data: []byte{0xFD, 0x21, 0x34, 0x12},
expected: Instruction{
Mnemonic: "LD IY, $1234",
Length: 4,
Address: 0x1234,
},
},
{
name: "ADD IY, BC",
data: []byte{0xFD, 0x09},
expected: Instruction{
Mnemonic: "ADD IY, BC",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "ADD IY, DE",
data: []byte{0xFD, 0x19},
expected: Instruction{
Mnemonic: "ADD IY, DE",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD (nn), IY",
data: []byte{0xFD, 0x22, 0x12, 0x34},
expected: Instruction{
Mnemonic: "LD ($3412), IY",
Length: 4,
Address: 0x3412,
},
},
{
name: "INC IY",
data: []byte{0xFD, 0x23},
expected: Instruction{
Mnemonic: "INC IY",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "INC IYH",
data: []byte{0xFD, 0x24},
expected: Instruction{
Mnemonic: "INC IYH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "DEC IYH",
data: []byte{0xFD, 0x25},
expected: Instruction{
Mnemonic: "DEC IYH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IYH, n",
data: []byte{0xFD, 0x26, 0x42},
expected: Instruction{
Mnemonic: "LD IYH, $42",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "ADD IY, IY",
data: []byte{0xFD, 0x29},
expected: Instruction{
Mnemonic: "ADD IY, IY",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IY, (nn)",
data: []byte{0xFD, 0x2A, 0x12, 0x34},
expected: Instruction{
Mnemonic: "LD IY, ($3412)",
Length: 4,
Address: 0x3412,
},
},
{
name: "DEC IY",
data: []byte{0xFD, 0x2B},
expected: Instruction{
Mnemonic: "DEC IY",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "INC IYL",
data: []byte{0xFD, 0x2C},
expected: Instruction{
Mnemonic: "INC IYL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "DEC IYL",
data: []byte{0xFD, 0x2D},
expected: Instruction{
Mnemonic: "DEC IYL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IYL, n",
data: []byte{0xFD, 0x2E, 0x42},
expected: Instruction{
Mnemonic: "LD IYL, $42",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "INC (IY+d)",
data: []byte{0xFD, 0x34, 0x05},
expected: Instruction{
Mnemonic: "INC (IY+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "DEC (IY+d)",
data: []byte{0xFD, 0x35, 0x05},
expected: Instruction{
Mnemonic: "DEC (IY+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD (IY+d), n",
data: []byte{0xFD, 0x36, 0x05, 0x42},
expected: Instruction{
Mnemonic: "LD (IY+$05), $42",
Length: 4,
Address: 0xFFFF,
},
},
{
name: "ADD IY, SP",
data: []byte{0xFD, 0x39},
expected: Instruction{
Mnemonic: "ADD IY, SP",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD B, IYH",
data: []byte{0xFD, 0x44},
expected: Instruction{
Mnemonic: "LD B, IYH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD B, IYL",
data: []byte{0xFD, 0x45},
expected: Instruction{
Mnemonic: "LD B, IYL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD B, (IY+d)",
data: []byte{0xFD, 0x46, 0x05},
expected: Instruction{
Mnemonic: "LD B, (IY+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD C, IYH",
data: []byte{0xFD, 0x4C},
expected: Instruction{
Mnemonic: "LD C, IYH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD C, IYL",
data: []byte{0xFD, 0x4D},
expected: Instruction{
Mnemonic: "LD C, IYL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD C, (IY+d)",
data: []byte{0xFD, 0x4E, 0x05},
expected: Instruction{
Mnemonic: "LD C, (IY+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD D, IYH",
data: []byte{0xFD, 0x54},
expected: Instruction{
Mnemonic: "LD D, IYH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD D, IYL",
data: []byte{0xFD, 0x55},
expected: Instruction{
Mnemonic: "LD D, IYL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD D, (IY+d)",
data: []byte{0xFD, 0x56, 0x05},
expected: Instruction{
Mnemonic: "LD D, (IY+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD E, IYH",
data: []byte{0xFD, 0x5C},
expected: Instruction{
Mnemonic: "LD E, IYH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD E, IYL",
data: []byte{0xFD, 0x5D},
expected: Instruction{
Mnemonic: "LD E, IYL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD E, (IY+d)",
data: []byte{0xFD, 0x5E, 0x05},
expected: Instruction{
Mnemonic: "LD E, (IY+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD IYH, B",
data: []byte{0xFD, 0x60},
expected: Instruction{
Mnemonic: "LD IYH, B",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IYH, C",
data: []byte{0xFD, 0x61},
expected: Instruction{
Mnemonic: "LD IYH, C",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IYH, D",
data: []byte{0xFD, 0x62},
expected: Instruction{
Mnemonic: "LD IYH, D",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IYH, E",
data: []byte{0xFD, 0x63},
expected: Instruction{
Mnemonic: "LD IYH, E",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IYH, IYH",
data: []byte{0xFD, 0x64},
expected: Instruction{
Mnemonic: "LD IYH, IYH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IYH, IYL",
data: []byte{0xFD, 0x65},
expected: Instruction{
Mnemonic: "LD IYH, IYL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD H, (IY+d)",
data: []byte{0xFD, 0x66, 0x05},
expected: Instruction{
Mnemonic: "LD H, (IY+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD IYH, A",
data: []byte{0xFD, 0x67},
expected: Instruction{
Mnemonic: "LD IYH, A",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IYL, B",
data: []byte{0xFD, 0x68},
expected: Instruction{
Mnemonic: "LD IYL, B",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IYL, C",
data: []byte{0xFD, 0x69},
expected: Instruction{
Mnemonic: "LD IYL, C",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IYL, D",
data: []byte{0xFD, 0x6A},
expected: Instruction{
Mnemonic: "LD IYL, D",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IYL, E",
data: []byte{0xFD, 0x6B},
expected: Instruction{
Mnemonic: "LD IYL, E",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IYL, IYH",
data: []byte{0xFD, 0x6C},
expected: Instruction{
Mnemonic: "LD IYL, IYH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD IYL, IYL",
data: []byte{0xFD, 0x6D},
expected: Instruction{
Mnemonic: "LD IYL, IYL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD L, (IY+d)",
data: []byte{0xFD, 0x6E, 0x05},
expected: Instruction{
Mnemonic: "LD L, (IY+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD IYL, A",
data: []byte{0xFD, 0x6F},
expected: Instruction{
Mnemonic: "LD IYL, A",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD (IY+d), B",
data: []byte{0xFD, 0x70, 0x05},
expected: Instruction{
Mnemonic: "LD (IY+$05), B",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD (IY+d), C",
data: []byte{0xFD, 0x71, 0x05},
expected: Instruction{
Mnemonic: "LD (IY+$05), C",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD (IY+d), D",
data: []byte{0xFD, 0x72, 0x05},
expected: Instruction{
Mnemonic: "LD (IY+$05), D",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD (IY+d), E",
data: []byte{0xFD, 0x73, 0x05},
expected: Instruction{
Mnemonic: "LD (IY+$05), E",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD (IY+d), H",
data: []byte{0xFD, 0x74, 0x05},
expected: Instruction{
Mnemonic: "LD (IY+$05), H",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD (IY+d), L",
data: []byte{0xFD, 0x75, 0x05},
expected: Instruction{
Mnemonic: "LD (IY+$05), L",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD (IY+d), A",
data: []byte{0xFD, 0x77, 0x05},
expected: Instruction{
Mnemonic: "LD (IY+$05), A",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "LD A, IYH",
data: []byte{0xFD, 0x7C},
expected: Instruction{
Mnemonic: "LD A, IYH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD A, IYL",
data: []byte{0xFD, 0x7D},
expected: Instruction{
Mnemonic: "LD A, IYL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD A, (IY+d)",
data: []byte{0xFD, 0x7E, 0x05},
expected: Instruction{
Mnemonic: "LD A, (IY+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "ADD A, IYH",
data: []byte{0xFD, 0x84},
expected: Instruction{
Mnemonic: "ADD A, IYH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "ADD A, IYL",
data: []byte{0xFD, 0x85},
expected: Instruction{
Mnemonic: "ADD A, IYL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "ADD A, (IY+d)",
data: []byte{0xFD, 0x86, 0x05},
expected: Instruction{
Mnemonic: "ADD A, (IY+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "ADC A, IYH",
data: []byte{0xFD, 0x8C},
expected: Instruction{
Mnemonic: "ADC A, IYH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "ADC A, IYL",
data: []byte{0xFD, 0x8D},
expected: Instruction{
Mnemonic: "ADC A, IYL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "ADC A, (IY+d)",
data: []byte{0xFD, 0x8E, 0x05},
expected: Instruction{
Mnemonic: "ADC A, (IY+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "SUB IYH",
data: []byte{0xFD, 0x94},
expected: Instruction{
Mnemonic: "SUB IYH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "SUB IYL",
data: []byte{0xFD, 0x95},
expected: Instruction{
Mnemonic: "SUB IYL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "SUB (IY+d)",
data: []byte{0xFD, 0x96, 0x05},
expected: Instruction{
Mnemonic: "SUB (IY+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "SBC A, IYH",
data: []byte{0xFD, 0x9C},
expected: Instruction{
Mnemonic: "SBC A, IYH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "SBC A, IYL",
data: []byte{0xFD, 0x9D},
expected: Instruction{
Mnemonic: "SBC A, IYL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "SBC A, (IY+d)",
data: []byte{0xFD, 0x9E, 0x05},
expected: Instruction{
Mnemonic: "SBC A, (IY+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "AND IYH",
data: []byte{0xFD, 0xA4},
expected: Instruction{
Mnemonic: "AND IYH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "AND IYL",
data: []byte{0xFD, 0xA5},
expected: Instruction{
Mnemonic: "AND IYL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "AND (IY+d)",
data: []byte{0xFD, 0xA6, 0x05},
expected: Instruction{
Mnemonic: "AND (IY+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "XOR IYH",
data: []byte{0xFD, 0xAC},
expected: Instruction{
Mnemonic: "XOR IYH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "XOR IYL",
data: []byte{0xFD, 0xAD},
expected: Instruction{
Mnemonic: "XOR IYL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "XOR (IY+d)",
data: []byte{0xFD, 0xAE, 0x05},
expected: Instruction{
Mnemonic: "XOR (IY+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "OR IYH",
data: []byte{0xFD, 0xB4},
expected: Instruction{
Mnemonic: "OR IYH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "OR IYL",
data: []byte{0xFD, 0xB5},
expected: Instruction{
Mnemonic: "OR IYL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "OR (IY+d)",
data: []byte{0xFD, 0xB6, 0x05},
expected: Instruction{
Mnemonic: "OR (IY+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "CP IYH",
data: []byte{0xFD, 0xBC},
expected: Instruction{
Mnemonic: "CP IYH",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "CP IYL",
data: []byte{0xFD, 0xBD},
expected: Instruction{
Mnemonic: "CP IYL",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "CP (IY+d)",
data: []byte{0xFD, 0xBE, 0x05},
expected: Instruction{
Mnemonic: "CP (IY+$05)",
Length: 3,
Address: 0xFFFF,
},
},
{
name: "POP IY",
data: []byte{0xFD, 0xE1},
expected: Instruction{
Mnemonic: "POP IY",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "EX (SP), IY",
data: []byte{0xFD, 0xE3},
expected: Instruction{
Mnemonic: "EX (SP), IY",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "PUSH IY",
data: []byte{0xFD, 0xE5},
expected: Instruction{
Mnemonic: "PUSH IY",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "JP (IY)",
data: []byte{0xFD, 0xE9},
expected: Instruction{
Mnemonic: "JP (IY)",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD SP, IY",
data: []byte{0xFD, 0xF9},
expected: Instruction{
Mnemonic: "LD SP, IY",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "Insufficient data for FD prefix",
data: []byte{0xFD},
hasError: true,
},
{
name: "Insufficient data for LD IY, nn",
data: []byte{0xFD, 0x21, 0x34},
hasError: true,
},
}
for _, tt := range tests {
t.Run(tt.name, func(t *testing.T) {
result, err := d.Decode(tt.data)
if tt.hasError {
if err == nil {
t.Errorf("expected error but got none")
}
return
}
if err != nil {
t.Fatalf("unexpected error: %v", err)
}
if result.Mnemonic != tt.expected.Mnemonic {
t.Errorf("mnemonic mismatch: got %q, want %q", result.Mnemonic, tt.expected.Mnemonic)
}
if result.Length != tt.expected.Length {
t.Errorf("length mismatch: got %d, want %d", result.Length, tt.expected.Length)
}
if result.Address != tt.expected.Address {
t.Errorf("address mismatch: got 0x%04X, want 0x%04X", result.Address, tt.expected.Address)
}
})
}
}

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@@ -1,512 +0,0 @@
// Package disasm provides tests for the Z80 disassembler implementation
package disasm
import (
"testing"
)
// TestDecodeUnprefixed tests decoding of unprefixed Z80 instructions
func TestDecodeUnprefixed(t *testing.T) {
d := New()
tests := []struct {
name string
data []byte
expected Instruction
hasError bool
}{
{
name: "NOP",
data: []byte{0x00},
expected: Instruction{
Mnemonic: "NOP",
Length: 1,
Address: 0xFFFF,
},
},
{
name: "LD BC, nn",
data: []byte{0x01, 0x34, 0x12},
expected: Instruction{
Mnemonic: "LD BC, $1234",
Length: 3,
Address: 0x1234,
},
},
{
name: "LD (BC), A",
data: []byte{0x02},
expected: Instruction{
Mnemonic: "LD (BC), A",
Length: 1,
Address: 0xFFFF,
},
},
{
name: "INC BC",
data: []byte{0x03},
expected: Instruction{
Mnemonic: "INC BC",
Length: 1,
Address: 0xFFFF,
},
},
{
name: "INC B",
data: []byte{0x04},
expected: Instruction{
Mnemonic: "INC B",
Length: 1,
Address: 0xFFFF,
},
},
{
name: "DEC B",
data: []byte{0x05},
expected: Instruction{
Mnemonic: "DEC B",
Length: 1,
Address: 0xFFFF,
},
},
{
name: "LD B, n",
data: []byte{0x06, 0x42},
expected: Instruction{
Mnemonic: "LD B, $42",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "RLCA",
data: []byte{0x07},
expected: Instruction{
Mnemonic: "RLCA",
Length: 1,
Address: 0xFFFF,
},
},
{
name: "EX AF, AF'",
data: []byte{0x08},
expected: Instruction{
Mnemonic: "EX AF, AF'",
Length: 1,
Address: 0xFFFF,
},
},
{
name: "ADD HL, BC",
data: []byte{0x09},
expected: Instruction{
Mnemonic: "ADD HL, BC",
Length: 1,
Address: 0xFFFF,
},
},
{
name: "LD A, (BC)",
data: []byte{0x0A},
expected: Instruction{
Mnemonic: "LD A, (BC)",
Length: 1,
Address: 0xFFFF,
},
},
{
name: "DEC BC",
data: []byte{0x0B},
expected: Instruction{
Mnemonic: "DEC BC",
Length: 1,
Address: 0xFFFF,
},
},
{
name: "INC C",
data: []byte{0x0C},
expected: Instruction{
Mnemonic: "INC C",
Length: 1,
Address: 0xFFFF,
},
},
{
name: "DEC C",
data: []byte{0x0D},
expected: Instruction{
Mnemonic: "DEC C",
Length: 1,
Address: 0xFFFF,
},
},
{
name: "LD C, n",
data: []byte{0x0E, 0xAB},
expected: Instruction{
Mnemonic: "LD C, $AB",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "RRCA",
data: []byte{0x0F},
expected: Instruction{
Mnemonic: "RRCA",
Length: 1,
Address: 0xFFFF,
},
},
{
name: "DJNZ e",
data: []byte{0x10, 0x05},
expected: Instruction{
Mnemonic: "DJNZ $05",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "JR e",
data: []byte{0x18, 0x0A},
expected: Instruction{
Mnemonic: "JR $0A",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "JR NZ, e",
data: []byte{0x20, 0x05},
expected: Instruction{
Mnemonic: "JR NZ, $05",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "JR Z, e",
data: []byte{0x28, 0x05},
expected: Instruction{
Mnemonic: "JR Z, $05",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "JR NC, e",
data: []byte{0x30, 0x05},
expected: Instruction{
Mnemonic: "JR NC, $05",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "JR C, e",
data: []byte{0x38, 0x05},
expected: Instruction{
Mnemonic: "JR C, $05",
Length: 2,
Address: 0xFFFF,
},
},
{
name: "LD HL, nn",
data: []byte{0x21, 0xCD, 0xAB},
expected: Instruction{
Mnemonic: "LD HL, $ABCD",
Length: 3,
Address: 0xABCD,
},
},
{
name: "LD (nn), HL",
data: []byte{0x22, 0x12, 0x34},
expected: Instruction{
Mnemonic: "LD ($3412), HL",
Length: 3,
Address: 0x3412,
},
},
{
name: "LD HL, (nn)",
data: []byte{0x2A, 0x12, 0x34},
expected: Instruction{
Mnemonic: "LD HL, ($3412)",
Length: 3,
Address: 0x3412,
},
},
{
name: "INC DE",
data: []byte{0x13},
expected: Instruction{
Mnemonic: "INC DE",
Length: 1,
Address: 0xFFFF,
},
},
{
name: "INC HL",
data: []byte{0x23},
expected: Instruction{
Mnemonic: "INC HL",
Length: 1,
Address: 0xFFFF,
},
},
{
name: "INC SP",
data: []byte{0x33},
expected: Instruction{
Mnemonic: "INC SP",
Length: 1,
Address: 0xFFFF,
},
},
{
name: "DEC DE",
data: []byte{0x1B},
expected: Instruction{
Mnemonic: "DEC DE",
Length: 1,
Address: 0xFFFF,
},
},
{
name: "DEC HL",
data: []byte{0x2B},
expected: Instruction{
Mnemonic: "DEC HL",
Length: 1,
Address: 0xFFFF,
},
},
{
name: "DEC SP",
data: []byte{0x3B},
expected: Instruction{
Mnemonic: "DEC SP",
Length: 1,
Address: 0xFFFF,
},
},
{
name: "JP nn",
data: []byte{0xC3, 0x12, 0x34},
expected: Instruction{
Mnemonic: "JP $3412",
Length: 3,
Address: 0x3412,
},
},
{
name: "JP NZ, nn",
data: []byte{0xC2, 0x12, 0x34},
expected: Instruction{
Mnemonic: "JP NZ, $3412",
Length: 3,
Address: 0x3412,
},
},
{
name: "JP Z, nn",
data: []byte{0xCA, 0x12, 0x34},
expected: Instruction{
Mnemonic: "JP Z, $3412",
Length: 3,
Address: 0x3412,
},
},
{
name: "JP NC, nn",
data: []byte{0xD2, 0x12, 0x34},
expected: Instruction{
Mnemonic: "JP NC, $3412",
Length: 3,
Address: 0x3412,
},
},
{
name: "JP C, nn",
data: []byte{0xDA, 0x12, 0x34},
expected: Instruction{
Mnemonic: "JP C, $3412",
Length: 3,
Address: 0x3412,
},
},
{
name: "JP PO, nn",
data: []byte{0xE2, 0x12, 0x34},
expected: Instruction{
Mnemonic: "JP PO, $3412",
Length: 3,
Address: 0x3412,
},
},
{
name: "JP PE, nn",
data: []byte{0xEA, 0x12, 0x34},
expected: Instruction{
Mnemonic: "JP PE, $3412",
Length: 3,
Address: 0x3412,
},
},
{
name: "JP P, nn",
data: []byte{0xF2, 0x12, 0x34},
expected: Instruction{
Mnemonic: "JP P, $3412",
Length: 3,
Address: 0x3412,
},
},
{
name: "JP M, nn",
data: []byte{0xFA, 0x12, 0x34},
expected: Instruction{
Mnemonic: "JP M, $3412",
Length: 3,
Address: 0x3412,
},
},
{
name: "CALL nn",
data: []byte{0xCD, 0x12, 0x34},
expected: Instruction{
Mnemonic: "CALL $3412",
Length: 3,
Address: 0x3412,
},
},
{
name: "RET",
data: []byte{0xC9},
expected: Instruction{
Mnemonic: "RET",
Length: 1,
Address: 0xFFFF,
},
},
{
name: "RST 00H",
data: []byte{0xC7},
expected: Instruction{
Mnemonic: "RST 00H",
Length: 1,
Address: 0x0000,
},
},
{
name: "RST 08H",
data: []byte{0xCF},
expected: Instruction{
Mnemonic: "RST 08H",
Length: 1,
Address: 0x0008,
},
},
{
name: "RST 10H",
data: []byte{0xD7},
expected: Instruction{
Mnemonic: "RST 10H",
Length: 1,
Address: 0x0010,
},
},
{
name: "RST 18H",
data: []byte{0xDF},
expected: Instruction{
Mnemonic: "RST 18H",
Length: 1,
Address: 0x0018,
},
},
{
name: "RST 20H",
data: []byte{0xE7},
expected: Instruction{
Mnemonic: "RST 20H",
Length: 1,
Address: 0x0020,
},
},
{
name: "RST 28H",
data: []byte{0xEF},
expected: Instruction{
Mnemonic: "RST 28H",
Length: 1,
Address: 0x0028,
},
},
{
name: "RST 30H",
data: []byte{0xF7},
expected: Instruction{
Mnemonic: "RST 30H",
Length: 1,
Address: 0x0030,
},
},
{
name: "RST 38H",
data: []byte{0xFF},
expected: Instruction{
Mnemonic: "RST 38H",
Length: 1,
Address: 0x0038,
},
},
{
name: "Insufficient data for LD BC, nn",
data: []byte{0x01, 0x34},
hasError: true,
},
{
name: "Unknown opcode",
data: []byte{0xFF},
expected: Instruction{
Mnemonic: "RST 38H",
Length: 1,
Address: 0x0038,
},
},
}
for _, tt := range tests {
t.Run(tt.name, func(t *testing.T) {
result, err := d.Decode(tt.data)
if tt.hasError {
if err == nil {
t.Errorf("expected error but got none")
}
return
}
if err != nil {
t.Fatalf("unexpected error: %v", err)
}
if result.Mnemonic != tt.expected.Mnemonic {
t.Errorf("mnemonic mismatch: got %q, want %q", result.Mnemonic, tt.expected.Mnemonic)
}
if result.Length != tt.expected.Length {
t.Errorf("length mismatch: got %d, want %d", result.Length, tt.expected.Length)
}
if result.Address != tt.expected.Address {
t.Errorf("address mismatch: got 0x%04X, want 0x%04X", result.Address, tt.expected.Address)
}
})
}
}