24 lines
780 B
Go
24 lines
780 B
Go
package z80
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import "testing"
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// Extra coverage for IX/IY (HL-replacement) timings:
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// - RES/SET on (IX+d)/(IY+d) should take 23 cycles via DDCB/FDCB.
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func TestDDCB_SET_RES_TimingAndWriteback(t *testing.T) {
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cpu, mem, _ := testCPU()
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cpu.IX = 0x3000
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mem.WriteByte(0x3005, 0x00)
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// DDCB 05 C6 = SET 0,(IX+5) (opcode C6 => SET 0,(HL) in CB space)
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loadProgram(cpu, mem, 0x0000, 0xDD, 0xCB, 0x05, 0xC6)
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c1 := mustStep(t, cpu)
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assertEq(t, mem.ReadByte(0x3005)&0x01, byte(1), "SET 0,(IX+5)")
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assertEq(t, c1, 23, "cycles for DDCB SET on (IX+d)")
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// DDCB 05 86 = RES 0,(IX+5)
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loadProgram(cpu, mem, cpu.PC, 0xDD, 0xCB, 0x05, 0x86)
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c2 := mustStep(t, cpu)
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assertEq(t, mem.ReadByte(0x3005)&0x01, byte(0), "RES 0,(IX+5)")
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assertEq(t, c2, 23, "cycles for DDCB RES on (IX+d)")
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}
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